{"id":25712,"date":"2024-12-16T09:40:30","date_gmt":"2024-12-16T08:40:30","guid":{"rendered":"https:\/\/www.md-elektronik.com\/?p=25712"},"modified":"2024-12-16T09:41:41","modified_gmt":"2024-12-16T08:41:41","slug":"lvds","status":"publish","type":"post","link":"https:\/\/www.md-elektronik.com\/cs\/lvds\/","title":{"rendered":"LVDS"},"content":{"rendered":"\n

Co znamen\u00e1 LVDS?<\/strong><\/h2>\n

LVDS (Low Voltage Differential Signalling, nebo-li n\u00edzkonap\u011b\u0165ov\u00e1 diferenci\u00e1ln\u00ed signalizace) je technologie elektrick\u00e9ho p\u0159enosu digit\u00e1ln\u00edch sign\u00e1l\u016f, kter\u00e1 se vyzna\u010duje n\u00edzk\u00fdmi nap\u011b\u0165ov\u00fdmi hladinami a diferenci\u00e1ln\u00edm p\u0159enosem sign\u00e1lu. Tato technologie se pou\u017e\u00edv\u00e1 v r\u016fzn\u00fdch aplikac\u00edch, v\u010detn\u011b p\u0159ipojen\u00ed obrazovek, po\u010d\u00edta\u010d\u016f a v automobilov\u00e9m pr\u016fmyslu.<\/p>\n

V\u00fdhody diferenci\u00e1ln\u00edho p\u0159enosu sign\u00e1lu pomoc\u00ed LVDS<\/h2>\n

U diferenci\u00e1ln\u00edho <\/strong>p\u0159enosu sign\u00e1lu se pou\u017e\u00edvaj\u00ed dva sign\u00e1lov\u00e9 vodi\u010de se stejn\u00fdm nap\u011bt\u00edm, ale s opa\u010dn\u00fdm znam\u00e9nkem, a diferenci\u00e1ln\u00ed nap\u011bt\u00ed se vyhodnocuje v p\u0159ij\u00edma\u010di. Pokud je vzd\u00e1lenost mezi vodi\u010di mal\u00e1, maj\u00ed ru\u0161en\u00ed ve spole\u010dn\u00e9m re\u017eimu stejn\u00fd \u00fa\u010dinek, a proto je lze odstranit vytvo\u0159en\u00edm rozd\u00edlu.\u00a0 V praxi LVDS pou\u017e\u00edv\u00e1 zdroj proudu, kter\u00fd generuje nap\u0159\u00edklad proud 3,5\u00a0miliamp\u00e9ru, \u010d\u00edm\u017e na zakon\u010dovac\u00ed odpor 100 Ohm na p\u0159ij\u00edma\u010di se p\u0159ivede nap\u011bt\u00ed 350\u00a0milivolt\u016f. V\u00fdsledkem zm\u011bny sm\u011bru proudu je inverzn\u00ed hladina -350 milivolt\u016f. Kroucen\u00fd sign\u00e1lov\u00fd vodi\u010d minimalizuje vliv a vyza\u0159ov\u00e1n\u00ed magnetick\u00fdch pol\u00ed.<\/p>\n

N\u00edzk\u00e9 nap\u011b\u0165ov\u00e9 hladiny u LVDS a jejich \u00fa\u010dinky<\/h2>\n

LVDS pracuje s diferenci\u00e1ln\u00edmi nap\u011b\u0165ov\u00fdmi hladinami v rozmez\u00ed 247 a\u017e 454 milivolt\u016f, na rozd\u00edl od jin\u00fdch technologi\u00ed, kter\u00e9 pracuj\u00ed s hladinami sign\u00e1lu o n\u011bkolika voltech. V\u00fdhoda n\u00edzk\u00fdch nap\u011b\u0165ov\u00fdch hladin, a tedy i n\u00edzk\u00fdch proud\u016f spo\u010d\u00edv\u00e1 ve spot\u0159eb\u011b energie p\u0159enosov\u00e9 cesty. P\u0159i intenzit\u011b proudu 3,5\u00a0miliamp\u00e9ru a nap\u011bt\u00ed 350\u00a0milivolt\u016f m\u00e1 zakon\u010dovac\u00ed odpor na p\u0159ij\u00edma\u010di spot\u0159ebu jen n\u011bco m\u00e1lo p\u0159es 1,2\u00a0miliwattu. D\u00edky n\u00edzk\u00e9 hladin\u011b se sou\u010dasn\u011b sni\u017euje vyza\u0159ovan\u00e9 ru\u0161iv\u00e9 z\u00e1\u0159en\u00ed.<\/p>\n

Pou\u017eit\u00ed LVDS<\/h2>\n

Technologie LVDS byla prvn\u011b p\u0159edstavena spole\u010dnost\u00ed National Semiconductor v roce 1994 a vzhledem k jej\u00edmu \u0161irok\u00e9mu vyu\u017eit\u00ed byla v roce 1995 standardizov\u00e1na jako ANSI\/TIA\/EIA-644, kdy National Semiconductor byla v pozici editora normy. Standard definuje rychlost p\u0159enosu dat 655\u00a0Mbit\/s, ale s modern\u00edmi \u010dipy ji\u017e bylo dosa\u017eeno rychlosti p\u0159enosu dat v rozsahu Gbit\/s. Z d\u016fvodu neust\u00e1le se zvy\u0161uj\u00edc\u00edho rozli\u0161en\u00ed se technologie LVDS p\u016fvodn\u011b pou\u017e\u00edvala pro propojen\u00ed obrazovek v z\u00e1bavn\u00ed elektronice a po\u010d\u00edta\u010d\u016f a d\u00edky sv\u00e9 vysok\u00e9 spolehlivosti a cenov\u011b v\u00fdhodn\u00e9 implementaci si na\u0161la cestu i do automobilov\u00e9ho pr\u016fmyslu. Standard LVDS se pou\u017e\u00edv\u00e1 jako technologie v r\u016fzn\u00fdch dal\u0161\u00edch protokolech, jako je FPD-Link, proto\u017ee ANSI\/TIA\/EIA-644 definuje pouze elektrick\u00e9 vlastnosti sign\u00e1lu, nap\u0159\u00edklad parametry vys\u00edla\u010de a p\u0159ij\u00edma\u010de, a nestanovuje \u017e\u00e1dn\u00e9 po\u017eadavky pro vy\u0161\u0161\u00ed \u00farovn\u011b protokolu. Nejvy\u0161\u0161\u00ed rychlosti p\u0159enosu dat se dosahuje v re\u017eimu simplex, tj. p\u0159i p\u0159enosu jednosm\u011brn\u00e9m p\u0159enosu dat od zdroje dat k p\u0159ij\u00edma\u010di dat, nap\u0159. z kamery na displej. S p\u0159\u00edslu\u0161n\u00fdmi \u010dipy je mo\u017en\u00fd i poloduplexn\u00ed p\u0159enos. P\u0159enosovou trasu lze tak\u00e9 provozovat st\u0159\u00eddav\u011b obousm\u011brn\u011b, sni\u017euje to v\u0161ak maxim\u00e1ln\u00ed rychlost p\u0159enosu dat. Vzhledem k vysok\u00e9 popt\u00e1vce byla vyvinuta tak\u00e9 multidrop verze LVDS. Zde jsou k hlavn\u00ed p\u0159enosov\u00e9 cest\u011b mezi vys\u00edla\u010dem a p\u0159ij\u00edma\u010dem spojen\u00ed bod-bod p\u0159ipojeny pomoc\u00ed odbo\u010dn\u00fdch veden\u00ed dal\u0161\u00ed p\u0159ij\u00edma\u010de. Maxim\u00e1ln\u00ed p\u0159enosov\u00e1 rychlost z\u00e1vis\u00ed na typu kabelu, d\u00e9lce p\u0159enosov\u00e9 cesty a na druhu p\u0159enosu.<\/p>\n

To by v\u00e1s tak\u00e9 mohlo zaj\u00edmat<\/h3>A\u00b2B (Automotive Audio Bus)\u00a0<\/a>ADAS<\/a>AMEC<\/a>APIX<\/a>Automotive Ethernet<\/a>Autonomn\u00ed \u0159\u00edzen\u00ed<\/a>C.A.S.E<\/a>FAKRA<\/a>FPD-Link<\/a>GMSL<\/a>H-MTD<\/a>HSD<\/a>Kabelov\u00e1 konfekce<\/a>Koax<\/a>Latence<\/a>LiDAR<\/a>Multi-Gig-Ethernet (multigigabitov\u00fd Ethernet)<\/a>On-board diagnostics (OBD)<\/a>P\u00e1te\u0159n\u00ed linky<\/a>Radar<\/a>Senzory<\/a>St\u00edn\u011bn\u00ed<\/a>V2X<\/a>WiGig<\/a><\/div>\n
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